FIG. 22 is a circuit block diagram of an AC inverter described in Japanese Laid-Open Patent Publication No. 2002-315351. One end of a power supply line 210a is connected to a power supply terminal of a DC input unit 210, such as a battery (e.g., a DC 12 V battery). The other end of the power supply line 210a is connected to a DC input filter 230, which may be formed by a choke coil and a capacitor. A switching circuit 240, which is a push-pull circuit, oscillates DC 12 V power from the DC input unit 210 at a frequency of, for example, 55 kHz. The high-frequency oscillation performed by the switching circuit 240 generates a high voltage output (e.g., 140 V) in a high voltage coil of a transformer 250. A DC high-voltage rectifier circuit 260 smoothes the waveform of the high-voltage output. Output voltage of the rectifier circuit 260 is supplied to a drive circuit 280 via a DC output line 260a. The drive circuit 280 (an AC inverter circuit) includes, for example, four FETs (field effect transistors) that are connected in an H-bridge with respect to two AC output lines 280a and 280b. The drive circuit 280 generates an AC voltage of, for example, 55 Hz at the AC output lines 280a and 280b by alternately driving two diagonal FETs at a predetermined duty ratio.
A secondary current detection unit outputs a detection signal in accordance with the current at the secondary side based on the potential difference between the two terminals of a shunt resistor connected to the ground side of the drive circuit. When overcurrent is detected, the switching circuit 240 is driven by forcibly setting the duty ratio to a value that is significantly less than the duty ratio required for rated output. Alternatively, in such a case, the supply of power is stopped by deactivating the drive circuit 280 or opening a relay in the power supply line 210a. 
However, in the AC inverter described in Japanese Laid-Open Patent Publication No. 2002-315351, the drive circuit 280 alternately drives the FETs in each of the diagonally positioned pairs. Thus, when the shunt resistor is connected to one of the two FETs arranged at the ground side, current is detected only when that FET is activated and cannot be detected when the diagonal FET is activated. Since current cannot be constantly detected, overcurrent may not accurately be detected.
If a shunt resistor is connected to each of the two FETs arranged at the ground side, current flowing through each of these alternately driven FETs may be detected. This would enable constant current detection. However, in this case, two shunt resistors would be necessary. This increases the number of components.
Further, in the AC inverter described in Japanese Laid-Open Patent Publication No. 2002-315351, when overcurrent is detected, a protection operation is performed by just forcibly decreasing the duty ratio of the switching circuit 240. However, there are various levels of overcurrent. For example, the overcurrent may be such that the power supply only needs to be restricted, the power supply must be stopped, or excessive power must be recovered from the load side. Additionally, there may be a case in which accurate overcurrent protection would be difficult just by decreasing the duty in accordance with the detection of overcurrent. Further, Japanese Laid-Open Patent Publication No. 2002-315351 only describes the operation performed during the occurrence of overcurrent by the DC-AC converter that performs conversion three times in the manner of DC→AC→DC→AC.